1. Field of the Invention
The present invention relates to a method of designing an integrated circuit device, and an integrated circuit device designed by such a method, and more particularly to an improvement in power supply ring interconnections for circuit blocks such as macros in an integrated circuit device.
2. Description of the Related Art
Large-scale integration (LSI) circuit devices have a network of power supply interconnections for supplying electric energy to circuits on LSI circuit chips. Circuit blocks such as macros can be embedded in gate arrays, which are a type of LSI circuit. In such gate arrays, blocks that have a circuit scale greater than cells comprising basic cells are embedded in a region where basic cells are arranged regularly. Standard cell chips have an array of circuit cells arranged in a column, the circuit cells having different sizes along the column and also different bulk structures respectively. In such standard cell chips, large-scale circuit blocks are embedded among arrays of circuit cells.
Generally, a ring of power supply interconnections is disposed around blocks, and connected to power supply terminals of the blocks. The ring of power supply interconnections is connected to a grid pattern of power supply interconnections in a cell array region outside of the blocks.
ASICs (Application Specific Integrated Circuits) such as gate arrays and standard cells are generally designed using an automatic interconnection designing software package as a designing tool. According to a process of mechanically providing blocks with a power supply ring using such a designing tool, however, if a plurality of blocks are positioned closely to each other, it is difficult to generate power supply interconnections while effectively utilizing an available space.